1. Field of the Invention
The present invention relates to data transmission and detection in communications networks, and, in particular, to the generation and transmission of an acknowledgment message to inform a transmitter that the receiver successfully received a message from the transmitter.
2. Description of the Related Art
One of the goals in the design of modern mobile communications systems is to increase network throughput, i.e., the bit rate of data traveling over wireless channels. Improvements in throughput can be achieved in a number of ways, e.g., exploiting spatial diversity by using multiple antennas at both the transmitter and receiver sides in a wireless local area network (WLAN), a technique referred to as multiple-input multiple-output (MIMO).
Improved throughput can also be achieved through a technique known as Quadrature Amplitude Modulation (QAM), whereby a group of buts are “mapped” onto a constellation point on a two-dimensional grid. The x-axis of the grid represents the amplitude of the cosine component in the eventual signal generated based on the constellation point, where as the y-axis represents the amplitude of the sine component in the eventual signal generated based on the constellation point. Accordingly, two amplitude-modulated (AM) signals are effectively combined into a single channel, thereby doubling the effective bandwidth.
Another method for achieving improved throughput, which may or may not be used in conjunction with MIMO, is orthogonal frequency division multiplexing (OFDM). In OFDM, a wideband channel is divided into narrowband “sub-channels” that are used to multiplex data, such that the center frequencies of the sub-channels (also called “tones” or “subcarriers”) and the symbol durations are chosen to permit maximum packing density of those sub-channels. OFDM can provide very high performance, including a low error rate and a long range, by employing advanced detection schemes at the receiver. One such scheme is Iterative Demodulation/Decoding (IDD), in which soft decisions of all bits of a message are cycled between a MIMO QAM demodulator (or “demapper”) and a sequence decoder. In this manner, the reliability of the soft decisions gradually improves, until hard decisions on each message bit are eventually made in a final iteration. Another advanced detection scheme is Successive Interference Cancellation (SIC), in which parts of a message are hard-decoded, remodulated, and subtracted from the actual antenna signals, resulting in a cleaner signal from which the remaining parts of the message are subsequently demodulated (or “demapped”) and decoded. In MIMO-OFDM, the different parts of a message that are decoded successfully in SIC are typically referred to as “layers,” i.e., signals transmitted from one transmit antenna that arrive at a plurality of receive antennas and overlay linearly with the layers arriving from one or more of the remaining transmit antennas.
Although the aforementioned advanced detection schemes may provide superior performance, they can introduce significant latency, i.e., processing delay, before the final decisions can be sent to the Medium Access Control (MAC) circuitry. The MAC circuitry performs a Cyclic Redundancy Check (CRC) on the message data it receives before further processing the message. If the CRC check is successful, then the MAC circuitry requests that the modem (or other device receiving the message data) transmit an Acknowledgment (ACK) frame back to the transmitter to confirm that the message was successfully received. If the CRC check fails, then the modem has an indication that an error occurred in the overall transmission. In this case, no ACK frame is transmitted back to the transmitter, and the transmitter attempts to retransmit the message as soon as it regains access to the wireless medium.
The time span between the last signal component of the incoming data frame and the first signal component of the ACK frame is precisely regulated. According to the IEEE 802.11 standard, this time period, which is referred to as the Short Interframe Spacing (SIFS) period, is 16 microseconds. Even with conventional WLAN transmission formats and detection schemes, this time budget can be very tight because, in addition to the detection, other tasks may need to be performed at the receiver in chronological order. Accordingly, in the event advanced detection schemes are desired for improved performance, the tasks being performed on an incoming message might not be completed in time for the ACK frame transmission.
Turning now to FIG. 1, the timing of a conventional process in a WLAN for transmitting a data frame 101 from a first station A to a second station B and for transmitting the corresponding ACK frame 102 from station B back to station A is illustrated. As shown, first, data frame 101 is transmitted from station A to station B. The total amount of time that station B has to switch between reception of data frame 101 and transmission of ACK frame 102 is limited by the SIFS period. During the SIFS period, station B must accomplish all tasks related to the reception of data frame 101, including determining the integrity of the packet by performing a CRC check. Also during the SIFS period, physical delays, such as those caused by analog radio propagation channel, transmit-to-receive, and receive-to-transmit turnaround times, can occur. The most common cause of these physical delays is transmitter ramp-up, including power amplifier (PA) ramp-up. In the process of FIG. 1, if the CRC check is successful, then ACK frame 102 is transmitted. If the CRC check is unsuccessful, then no ACK frame is transmitted, thereby causing station A to retransmit data frame 101 at a later time.
With reference now to FIG. 2, a PHY (physical layer) frame format of a data frame (e.g., data frame 101 of FIG. 1) consistent with the IEEE 802.11a/g standard in an OFDM implementation is shown graphically. As shown, the frame format has a preamble 201, a signal field 202, and a data portion 203. Preamble 201 consists of ten short training symbols t1 through t10 a guard interval (GI2), and two long training symbols T1 and T2. Signal field 202 contains a guard interval (GI) and several signaling parameters for the current transmission, e.g., its length and data rate in Mbps. Data portion 203 includes two data symbols, each preceded by a guard interval (GI). While data portion 203 of FIG. 2 has only two data symbols, different numbers of data symbols might be included in an IEEE 802.11 data frame. Included in one or more of the symbols is a MAC frame (shown in further detail in FIG. 3), which is described in further detail below.
FIG. 3 illustrates graphically the MAC frame format of a data frame (e.g., DATA 1 of FIG. 2) consistent with the IEEE 802.11 standard. The various fields shown contain the information exchanged between the MAC instances at the transmitter and receiver stations. This information typically includes the access to the medium, addressing, data checking, and data framing. Each MAC instance may hold counters about received and transmitted frames and several timers required for network management. The Address 1 field contains the destination address, and the Address 2 field contains the source address. A receiver that receives a MAC frame tries first to decode the Address 1 field at an early point in time. If it is determined that a different station is the intended recipient, then processing of the remaining portions of the packet is not performed. The frame body field contains the frame data, and a frame checksum (FCS) field appears at the end of the frame for use in verifying whether the frame was correctly received.
With reference now to FIG. 4, the format of an exemplary ACK frame (e.g., ACK frame 102 of FIG. 1) consistent with the IEEE 802.11 standard is illustrated graphically. As shown, the ACK frame includes fields for frame control, duration, destination receiver address, and frame checksum (FCS).
FIG. 5 is a timing diagram illustrating an exemplary prior art data flow in a WLAN receiver using OFDM under IEEE 802.11a/g, which data flow corresponds to the role of station B of FIG. 1. Last-1 segment 501 represents the penultimate data symbol of frame 101 of FIG. 1. Last segment 502 represents the last data symbol of data frame 101 of FIG. 1. Various analog-to-digital conversion and signal calibration steps (not shown) may be performed on these data symbols. The OFDM data symbol of segment 501 is processed by a Fast Fourier Transformation (FFT) (503) and demodulation/demapping (and possibly deinterleaving) operations (505). The OFDM data symbol of segment 502 is processed by an FFT (504) and demodulation/demapping (and possibly deinterleaving) operations (506). The result of this processing is a set of “soft bits” (i.e., likelihood values) that are forwarded to a Vitterbi decoder 507, which, based on the sequence of soft bits, generates the most likely message of information bits and forwards the message, bit by bit, to MAC circuitry 508, where the CRC check is carried out. If the CRC check is successful, then the message is forwarded to higher communication layers (e.g., TCP/IP), and ACK frame 102 is transmitted. The CRC check result is available a sufficient amount of time before the end of the SIFS period to enable ramp-up of the transmitter (e.g., the power amplifier) by the end of the SIFS period.
FIG. 6 is a state diagram illustrating exemplary states of a state machine in a prior art WLAN receiver using OFDM, wherein the state machine is embodied in a receiver corresponding to the role of station B of FIG. 1, whose data flow is illustrated in FIG. 5. The states include Idle state 601, Receive Data & Send to MAC state 602, Transmit ACK frame state 603, and Wait states 604 and 605. The state machine begins in Idle state 601 and remains there until a packet is detected, in which case Receive Data & Send to MAC state 602 is entered. In Receive Data & Send to MAC state 602, detection and CRC checking are performed. If, during the detection process, it is determined that the MAC destination address (Address 1 field in FIG. 3) reveals that the packet is intended for another station, then the present station will revert to Idle state 601. This reversion might not occur until a time trigger is issued that the channel is once again usable, the wait for the time trigger being represented by Wait state 605. If the MAC destination address reveals that the packet is indeed intended for the present station, then the detection process continues. Once detection is complete, if the CRC check fails, then the state machine returns to Idle state 601. If it is determined that the CRC check is successful, then the state machine enters Wait state 604 until the end of the SIFS period, at which time Transmit ACK frame state 603 is entered, and the ACK frame is transmitted. Once the ACK frame is complete, the state machine returns to Idle state 601. The amount of time spent in Wait state 604 between the outcome of the CRC check and the time trigger to send the ACK frame might be rather limited, due to the large number of tasks that need to be carried out during the SIFS period and which cannot always be parallelized. The station acting as a receiver in the present transmit request can transmit its own frames as well, in which case, in the initial Idle state 601, the receiver would undergo other states, not shown in FIG. 6 or described herein.
FIG. 7 shows an exemplary hardware configuration 701 for a high-performance detection scheme employing Iterative Demapping/Decoding (IDD) in a WLAN receiver using OFDM. The transmit scheme corresponding to this mechanism is referred to as Space-Time Bit-Interleaved Coded Modulation (ST-BICM). Symbols received at antennas 702-1, 702-2 are provided to preprocessing circuitry 703, which includes, e.g., performing Fast Fourier Transformations. The output of preprocessing circuitry 703 is provided to a MIMO demapper 704, which generates, for each bit coded into a MIMO-ODFM subcarrier (e.g., using QAM modulation), a soft bit using the signals from the channel that are received at antennas 702-1, 702-2, and possibly also using extrinsic information obtained from a Maximum A Posteriori (MAP) decoder 707. In the first iteration, no extrinsic information is yet available, so the soft bits are generated based solely on the signals received at antennas 702-1, 702-2. Next, the soft bits are provided to a deinterleaver 705 to be deinterleaved. MAP decoder 707 then uses the information provided by deinterleaver 705 and the properties of the (convolutional) channel code to produce improved soft bits. The extrinsic information, i.e., the estimate of each bit provided by MAP decoder 707, is passed back to demapper 704 after being re-interleaved by interleaver 706, which provides its output to demapper 704. Demapper 704 can now use this extrinsic information to improve the demapping process, thereby producing further-improved soft bits. The decoding process repeats until the iterative process is complete and hard bits are generated as the output of MAP decoder 707.
With reference now to FIG. 8, the temporal succession of the various demapping/decoding and deinterleaving/interleaving iterations in the exemplary hardware configuration of FIG. 7 is shown. As can be seen, the first iteration receives raw samples from the Fast Fourier Transform circuitry. Each iteration involves demapping, deinterleaving, decoding, and interleaving, except for the final iteration, which involves only demapping, deinterleaving, decoding, and a final step of making hard-bit decisions of the data contained in the message.
FIG. 9 illustrates another exemplary hardware configuration 901 for a high-performance detection scheme. The transmit scheme corresponding to this mechanism is referred to as Vertical Bell Labs Layered Space-Time (V-BLAST) code modulation. In this scenario, a single signal “layer” (i.e., the bits corresponding to a (QAM) symbol transmitted from only one of the several transmit antennas) at a time is initially demapped, while the signal components corresponding to the (QAM) symbols from other transmit antennas also present are temporarily ignored. Then, MIMO Layer-1 is deinterleaved and Viterbi-decoded in a conventional manner. The results of the Viterbi decoding are used to reconstruct the actual receive signals of Layer-1, using knowledge of the exact channel state (i.e., phase and magnitude between each transmit antenna-receive antenna pair, per OFDM subcarrier). This reconstructed symbol for MIMO Layer-1 is subtracted from the overall input signal, thereby providing a “cleaner” signal for detection of Layer-2.
Accordingly, symbols received at antennas 902-1, 902-2 are provided to preprocessing circuitry 903, which performs, e.g., Fast Fourier Transformations. The output of preprocessing circuitry 903 is provided to MIMO demapper 904-1, which generates, for each bit coded into the MIMO-ODFM subcarrier (e.g., using QAM modulation), a soft bit using the signals that are received at antennas 902-1, 902-2, and possibly also using extrinsic information obtained from Viterbi decoder 907-1. In the first iteration, no extrinsic information is yet available, so the soft bits are generated based solely on the signals received at antennas 902-1, 902-2. The output from preprocessor 903 is also provided to delay circuits 909-1, 909-2, which, after one symbol period T, provide the preprocessed signals to subtractors 908-1, 908-2. The soft bits generated by demapper 904-1 are provided to deinterleaver 905-1 to be deinterleaved. Viterbi decoder 907-1 then uses the information provided by deinterleaver 905-1 and the properties of the (convolutional) channel code to produce improved soft bits, which Viterbi decoder 907-1 outputs as the decoded MIMO Layer-1 data. The “extrinsic information” is generated by the information bits provided by Viterbi decoder 907-1, which are channel re-encoded and interleaved by encoding interleaver 906, which provides its output to a remodulator KK. Remodulator KK translates the bit stream into complex symbol format, e.g., QAM. The output of remodulator KK is provided to subtractors 908-1, 908-2, each of which provides a signal representing the reconstructed Layer-1 signal subtracted from one of the received input signals, which resulting difference signal is a “cleaner” signal (i.e., due to the removal of the Layer-1 data) that is then provided to MIMO demapper 904-2 for demapping. Using the “cleaner” signal, demapper 904-2 provides soft bits to deinterleaver 905-2, which deinterleaves the soft bits and provides its output to Viterbi decoder 907-2. Viterbi decoder 907-2 provides the decoded MIMO Layer-2 data as its output.
Turning now to FIG. 10, a timing diagram illustrating the latency problem in an exemplary prior art WLAN receiver data flow using OFDM is presented. Last-1 segment 501 represents the penultimate data symbol of frame 101 of FIG. 1. Last segment 502 represents the last data symbol of data frame 101 of FIG. 1. Various analog-to-digital conversion and signal calibration steps (not shown) may be performed on these data symbols. The OFDM data symbol of segment 501 is processed by an FFT (1003) and demodulation/demapping (and possibly deinterleaving) operations (1005). The OFDM data symbol of segment 502 is processed by an FFT (1004) and demodulation/demapping (and possibly deinterleaving) operations (1006). The detected symbols are forwarded to MAC circuitry 1007, where the CRC check is carried out. If the CRC check is successful, then the message should be forwarded to higher communication layers (e.g., TCP/IP), and an ACK frame 102 should be transmitted. However, as can be seen, the SIFS period is not long enough to accommodate the more-involved DSP processing, the delayed completion of the CRC check, and other possible tasks relating to the packet reception. The time required for transmitter ramp-up further aggravates this problem. Accordingly, by the time the CRC check is determined to be successful, it is too late to send ACK frame 102.
Prior art solutions to this latency problem include avoiding the use of advanced, high-performance detection schemes or using fewer iterations in an iterative scheme. These solutions, however, result in decreased performance in terms of packet error rate (PER), effectively leading to lower throughput, which results in lower physical data rates and/or a shorter range between the transmitter and the receiver. Other solutions involve (i) using faster clock speeds and (ii) using parallel processing by employing relatively large-scale circuitry. However, these solutions typically result in increased power consumption and increased fabrication cost for the circuitry.